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? 2004 california micro devices corp. all rights reserved. 01/20/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 1 CM3112 preliminar y 150ma/1.2v cmos ldo regulator with power good features ? ldo regulator with power good no capacitor required on the ldo output power good (pg) control signal regulated 1.2v output 150ma output current low quiescent operating current (90 a typical) "zero" disable mode current foldback current limiting protection thermal shutdown protection sot23-5 package micrel mic5258, mic5268 compatible pinout lead-free version available applications pentium ? 4 motherboards pc cards peripheral adapter cards product description the CM3112-12 is a low quiescent current (90ua) reg- ulator that delivers up to 150ma of load current at a fixed 1.2v output. all the necessary circuitry has been included to deliver a 50 ? power good signal (open drain) which remains for 5ms after the output has exceeded 90% (typ) of its nominal level. a dedicated control input (en, active high) has been included for power-up sequencing flexibility. when this input is taken low, the regulator is disabled. in this state, the supply current will drop to near zero. an inter- nal discharge mosfet (500 ? ) resistance will force the output to ground whenever the device has been shut- down. the CM3112-12 is fully protected, offering both over- load current limiting and high temperature thermal shutdown. housed in a tiny sot23 package, the device is ideal for space critical applications and is also available with optional lead-free finishing. simplified electrical schematic typical application circuit in en out gnd 0.1 f* v out gnd CM3112-12 pg 1k ? v in pg en * optional 0.1 f* en + in gnd out - v ref 1.2v 2.5ms + - v ref x 0.93 1x pg 1.2v/150ma
? 2004 california micro devices corp. all rights reserved. 2 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/20/04 CM3112 preliminar y ordering information note 1: parts are shipped in tape & reel form unless otherwise specified. pin descriptions pin name description 1 in positive input voltage for the regulator. the internal loading on this input is typically 300 a when- ever the regulator is enabled, and less than 10 a when the regulator is disabled. if the in pin is within a few inches of the main input filter, a capacitor may not be necessary. otherwise an input fil- ter capacitor (c in ) of 0.1uf to 1uf will ensure adequate filtering. 2 gnd the negative reference for all voltages. 3 en enable/shutdown input. when en is asserted high (v en 1.6v), the regulator is enabled. when en is asserted low (v en 0.4v), the regulator?s series pass transistor is forced into a high impedance mode and an internal discharge resistance (500 ? ) is applied to the output to quickly reduce the out- put voltage to 0 volts. 4 pg power good output. this is an open drain output and functions as a supply voltage supervisor for the output voltage. it is asserted low when the output falls below 84% of its nominal value. this out- put becomes inactive when (en > 1.5v), (2.5v < v in < 5.5v) and (v out > 97% of v outnom) , all of which are valid for more than 1-10ms. 5 out the regulated voltage output. although an output capacitor is not necessary for stable regulator operation, a optional 0.1uf capacitor can be used to provide an added measure of output stability. package / pinout diagram note: this drawing is not to scale. 5-pin sot23 in gnd en out pg 1 2 5 3 4 fa12/fb12 top view part numbering information regulator pins package standard finish lead-free finish ordering part number 1 part marking ordering part number 1 part marking CM3112-12 5 sot23-5 CM3112-12st fa12 CM3112-12so fb12
? 2004 california micro devices corp. all rights reserved. 01/20/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 3 CM3112 preliminar y specifications note 1: the power rating is based on a printed circuit board heat spreading capability equivalent to 2 square inches of copper c on- nected to the gnd pins. typical multi-layer boards using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. please consult with factory for thermal evaluation assistance. absolute maximum ratings parameter rating units esd protection (hbm) + 2000 v pin voltages v in v out v en [gnd - 0.6] to +6.0 [gnd - 0.6] to [v in +0.6] [gnd - 0.6] to [v in +0.6] v v v storage temperature range -40 to +150 c operating temperature range ambient junction 0 to +70 0 to +150 c c power dissipation (see note 1) internally limited w standard operating conditions parameter valu e units v in 2.5 to 5.5 v ambient operating temperature range 0 to +70 c load current 0 to 150 ma c out 0 to 10 f
? 2004 california micro devices corp. all rights reserved. 4 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/20/04 CM3112 preliminar y note 1: b old values indicate 0 c < t j <125 c. electrical operating characteristics (see note 1) symbol parameter conditions min typ max units v out output voltage accuracy i load = 5ma, v in = 3.3v -2 -3 2 3 % % v out output voltage 5ma < i load < 150ma, 3.135v < v in < 5.5v -4 -5 4 5 % % v r load load regulation 5ma < i load < 100ma 0.5 0.7 % % v r line line regulation xx i load = 5ma; 2.5v < v in < 5.5v 0.1 0.15 %/v %/v r drop dropout resistance v in = 2.7v 10 ? i lim overload current limit 160 400 ma i sc short circuit current limit v out < 0.5v 150 ma r disch discharge resistance en tied to gnd 500 ? i gnd ground current regulator enabled (en=v in ); i load = 0ma regulator enabled (en=v in ); i load = 150ma regulator disabled (en=gnd); (disable mode) 90 100 0.01 150 200 10 a a a v en en input logic high threshold regulator enabled, v in = 5.5v 1.6 v v dis en input logic low threshold regulator disabled, v in = 5.5v 0.4 v i en enable input current 0.01 10 a v pgl power good low threshold % of v out (pg on) 84 % v pgh power good high threshold % of v out (pg off) 97 % v ol power good logic "0" voltage i l = 2ma; fault condition 0.05 0.1 v i pg power good leakage current power good off; v pg = 5.5v 0.01 50 a d pgd d pga power good delay time to de-assert pg to assert pg 2.5v < v in < 5.5v (applies to d pgd only) 1 10 1 ms ms
? 2004 california micro devices corp. all rights reserved. 01/20/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 5 CM3112 preliminar y timing diagram figure 1. power good delay timing active inactive pg en v out v pg d pga d pgd 100% 90% d pgd
? 2004 california micro devices corp. all rights reserved. 6 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/20/04 CM3112 preliminar y performance information CM3112 typical dc characteristics (nominal conditions unless specified otherwise) nominal conditions: v in = 3.3v, i load =1ma, no c out load regulation 1.152 1.164 1.176 1.188 1.200 1.212 1.224 1.236 1.248 0 100 200 300 400 load current [ma] output voltage [v] line regulation (1% and 100% rated load) 1.152 1.164 1.176 1.188 1.200 1.212 1.224 1.236 1.248 1.0 2.0 3.0 4.0 5.0 6.0 input voltage [v] output voltage [v] 1ma load 150ma load load regulation (close-up) -5 -4 -3 -2 -1 0 050100150 load current [ma] delta vout [mv] line regulation (close-up) 0.0 0.5 1.0 1.5 2.0 2.5 2.0 3.0 4.0 5.0 6.0 input voltage [v] delta vout [mv] 1ma load foldback current limiting 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 100 200 300 400 load current [ ma ] output voltage [v] line regulation 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 0123456 input voltage [v] output voltage [v] 1ma load
? 2004 california micro devices corp. all rights reserved. 01/20/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 7 CM3112 preliminar y performance information (cont?d) CM3112 typical dc characteristics (cont?d, nominal conditions unless specified otherwise) ground current vs. supply voltage 0 20 40 60 80 100 120 0123456 input voltage [v] ground current [ua] 1ma load en = vin ground current vs. load current 0 25 50 75 100 125 150 050100150 load current [ma] ground current [ua] enable threshold vs. supply voltage 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 23456 supply voltage [v] threshold [v] power good voltage vs. pull-up resistor 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 1 10 100 1000 10000 pull-up resistor [ ? ] power good [v] power fail
? 2004 california micro devices corp. all rights reserved. 8 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/20/04 CM3112 preliminar y performance information (cont?d) CM3112 transient characteristics (nominal conditions unless specified otherwise) load transient step response load transient step response load transient step response load transient step response load transient step response load transient step response
? 2004 california micro devices corp. all rights reserved. 01/20/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 9 CM3112 preliminar y performance information (cont?d) CM3112 transient characteristics (nominal conditions unless specified otherwise) line transient step response line transient step response line transient step response cold start & power down enable response vout enable response
? 2004 california micro devices corp. all rights reserved. 10 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/20/04 CM3112 preliminar y performance information (cont?d) CM3112 typical ac characteristics (nominal conditions unless specified otherwise) power supply ripple rejection (no cout, vin=5v) 0 10 20 30 40 50 60 70 80 90 10 100 1000 10000 100000 frequency [hz] psrr [db] 150m a 20ma 1ma no cout, vin = 5v 50ma power supply ripple rejection (cout=1uf, vin=5v) 0 10 20 30 40 50 60 70 80 90 10 100 1000 10000 100000 frequency [hz] psrr [db] 150m a 20ma 1m a cout=1uf, vin=5v 50ma power supply ripple rejection (no cout, vin=3.3v) 0 10 20 30 40 50 60 70 80 10 100 1000 10000 100000 fr e que nc y [ hz ] psrr [db] 150m a 20ma 1ma no cout, vin = 3.3v 50ma power supply ripple rejection (cout=1uf, vin=3.3v) 0 10 20 30 40 50 60 70 80 10 100 1000 10000 100000 frequency [hz] psrr [db] 150m a 20ma 1m a cout=1uf, vin=3.3v 50ma output noise (no cout) 1.e-06 1.e-05 10 100 1000 10000 100000 frequency [hz] en[uv/roothz] no c out 1 ma 150 ma output noise (1uf cout) 1.e-06 1.e-05 10 100 1000 10000 100000 frequency [hz] en[uv/roothz] cout=1uf 1 ma 150 ma
? 2004 california micro devices corp. all rights reserved. 01/20/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 11 CM3112 preliminar y performance information (cont?d) CM3112 typical thermal characteristics vout over temperature -50 -40 -30 -20 -10 0 10 20 30 40 50 0255075100125 temperature [ o c] output change [mv] vout over temperature -50 -40 -30 -20 -10 0 10 20 30 40 50 -50 -25 0 25 50 75 100 125 150 temperature [ o c] output change [mv] ground current over temperature 0 50 100 150 200 -50 -25 0 25 50 75 100 125 150 temperature [ o c] ground current [ua] time delay over temperature 0 2 4 6 8 10 25 50 75 100 125 temperature [ o c] time delay [ms]
? 2004 california micro devices corp. all rights reserved. 12 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/20/04 CM3112 preliminar y application information output capacitor unlike other ldo regulators the CM3112 does not require an output capacitor for stability. it is stable with any capacitor from 0 to 10uf. adding output capacitance will improve the very high frequency transient response of the part. figures 1-7 demonstrate the effect of output capacitance on a 10ma to 140ma transient load step. in first 3 figures the load step is applied with a rise time of approximately 1us. adding capacitance does not improve the response. the last three figures show the load step with a rise time of about 200ns. while the 0.1uf capacitor does not improve the response the 1uf capacitor decreases the overall magnitude of the transient spike. figure: 2 figure: 3 figure: 4 figure: 5 figure: 6 figure: 7
? 2004 california micro devices corp. all rights reserved. 01/20/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 13 CM3112 preliminar y application information (cont?d) power dissipation/handling the overall junction to ambient thermal resistance ( ja ) for device power dissipation (p d ) consists prima- rily of two paths in series. the first path is the junction to the case ( jc ) which is defined by the package style, and the second path is case to ambient ( ca ) thermal resistance which is dependent on board layout. the final operating junction temperature for any set of con- ditions can be estimated by the following thermal equa- tion: t junc = t amb + p d ( jc ) + p d ( ca ) = t amb + p d ( ja ) the CM3112-12 uses a sot23-5 package. when this package is mounted on a double sided printed circuit board with two square inches of copper allocated for "heat spreading", the resulting ja is 175c/w. based on a maximum power dissipation of 315mw (2.1vx150ma), with an ambient of 70c the resulting junction temperature will be: t junc = t amb + p d ( ja ) = 70c + 315mw (175c/w) = 70c + 55c = 125c thermal characteristics were measured using a double sided board with two square inches of copper area connected to the gnd pins for "heat spreading". measurements showing performance up to junction temperature of 125c were performed under light load conditions (1ma). this allows the ambient temperature to be representative of the internal junction tempera- ture. note: the use of multi-layer board construction with separate ground and power planes will further enhance the overall thermal performance. in the event of no copper area being dedicated for heat spreading, a multi-layer board construction, using only the minimum size pad layout, will provide the CM3112-12 with an overall ja of 175c/w which allows up to 450mw to be safely dissipated. input capacitor if the vin pin is within a few inches of the main input fil- ter, a capacitor may not be necessary. otherwise an input filter capacitor (c in ) of 0.1uf to 1uf will ensure adequate filtering. enable/disable whenever this input is taken low, the regulator pass transistor is forced into a high impedance mode and an internal discharge resistance (500 ? ) will be applied from the output to ground. power good this is an open drain output signal. it works as a sup- ply voltage supervisor for the output voltage. it is asserted when the output falls below 84% (when 2.5v 1.5v b) 2.5v < v in < 5.5v c) v out > 97% of v outnom
? 2004 california micro devices corp. all rights reserved. 14 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/20/04 CM3112 preliminar y mechanical details sot23-5 mechanical specifications dimensions for CM3112-12 device packaged in 5-pin sot23 package are presented below. for complete information on the sot23-5 package, see the california micro devices sot23 package infor- mation document. package dimensions for sot23-5. package dimensions package sot23-5 (jedec name is mo-178) pins 5 dimensions millimeters inches min max min max a -- 1.45 -- 0.0571 a1 0.00 0.15 0.0000 0.0059 b 0.30 0.50 0.0118 0.0197 c 0.08 0.22 0.0031 0.0087 d 2.75 3.05 0.1083 0.1201 e 2.60 3.00 0.1024 0.1181 e1 1.45 1.75 0.0571 0.0689 e 0.95 bsc 0.0374 bsc e1 1.90 bsc 0.0748 bsc l 0.30 0.60 0.0118 0.0236 l1 0.60 ref 0.0236 ref # per tape and reel 3000 pieces mechanical package diagrams top view 54 e1 e e1 e b a side view d a1 l1 end view c l 12 3

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